10 LoRaWAN Device Firmware-Over-The-Air Upgrade (FUOTA)

The IMX93-GW8016 gateway supports FUOTA (Firmware Update Over-The-Air), enabling remote firmware updates for LoRaWAN devices without any on-site intervention.

10.1 FUOTA Technical Principles

FUOTA is based on the LoRa Alliance LoRaWAN Fragmented Data Block Transport Specification, using the LDPC (Low Density Parity Check) forward error correction algorithm to achieve reliable large-block data transfer over LoRaWAN's low-rate, lossy wireless channel.

10.1.1 Core Technical Features

  1. Forward Error Correction: LDPC algorithm adds redundant encoding; the complete firmware can be recovered even if some packets are lost
  2. Fragment Transmission: Split the firmware file into fixed-size data blocks (fragments) and deliver them one by one
  3. No Retransmission: In ideal conditions, delivery relies only on one-way downlink broadcasts, reducing network airtime load
  4. High Fault Tolerance: Supports 20–30% packet loss rate while still successfully recovering the firmware

10.2 FUOTA Architecture Diagram

graph TB subgraph "Gateway" GW["IMX93-GW8016<br/>FUOTA Server"] ENCODER["LDPC Encoder"] FRAGMENT["Fragmentation Manager"] SCHEDULER["Downlink Scheduler"] end subgraph "LoRa Wireless Transmission" AIR["LoRaWAN downlink<br/>Packet loss rate: 0-30%"] end subgraph "LoRaWAN End Device" DEV["Sensor Node"] DECODER["LDPC Decoder"] STORAGE["Flash Storage"] BOOTLOADER["Bootloader"] end subgraph "FUOTA Process" FLOW1["① Firmware Encoding<br/>M blocks → N blocks<br/>(N > M)"] FLOW2["② Fragment Delivery<br/>one by one"] FLOW3["③ Receive & Decode<br/>Recover M blocks"] FLOW4["④ Firmware Verification<br/>CRC32/SHA256"] FLOW5["⑤ Apply Upgrade<br/>Restart to activate"] end %% Encoding flow GW -->|Firmware file| ENCODER ENCODER -->|Encoded blocks| FRAGMENT FRAGMENT -->|Fragment sequence| SCHEDULER SCHEDULER -->|LoRa downlink| AIR %% Wireless transmission AIR -.->|Partial packet loss| DEV %% Decoding flow DEV -->|Received blocks| DECODER DECODER -->|Recovered firmware| STORAGE STORAGE -->|Checksum OK| BOOTLOADER BOOTLOADER -->|Upgrade complete| DEV %% Process annotations ENCODER -.->|maps to| FLOW1 SCHEDULER -.->|maps to| FLOW2 DECODER -.->|maps to| FLOW3 STORAGE -.->|maps to| FLOW4 BOOTLOADER -.->|maps to| FLOW5 %% Styles classDef gateway fill:#e3f2fd,stroke:#0d47a1,stroke-width:2px classDef device fill:#e8f5e9,stroke:#1b5e20,stroke-width:2px classDef air fill:#fff3e0,stroke:#e65100,stroke-width:2px classDef flow fill:#fce4ec,stroke:#880e4f,stroke-width:2px class GW,ENCODER,FRAGMENT,SCHEDULER gateway class DEV,DECODER,STORAGE,BOOTLOADER device class AIR air class FLOW1,FLOW2,FLOW3,FLOW4,FLOW5 flow

10.3 LDPC Algorithm Principle

10.3.1 Encoding Process

steps

  1. Divide the firmware file into M equal-sized data blocks, each containing FragSize bytes - Raw data matrix: [B1, B2, B3, ..., Bm]
  2. Generate N-M redundancy data blocks using the LDPC algorithm (N > M) - Redundancy data: [Bm+1, Bm+2, ..., BN]
  3. Each redundancy block Bx is generated from the original data blocks via XOR operations: - Bx = Cx1·B1 ⊕ Cx2·B2 ⊕ ... ⊕ Cxm·Bm - where Cx is a pseudorandom boolean vector generated by the matrix_line(x-m, M) function

Example:

  • Firmware size: 50 KB, fragment size: 200 bytes
  • Raw data blocks: M = 256 blocks
  • Encoded blocks:N = 320 (redundancy 25%)
  • Theoretically tolerable packet loss: 64 blocks (20%)

10.3.2 Decoding Process

The gateway uses Algorithm 2 (Semtech optimized implementation), which has lower memory usage compared to the standard Algorithm 1:

Algorithm 1 (Protocol Standard):

  • Memory usage:M × M + 2 × M
  • Use Case: General-purpose, no memory restrictions

Algorithm 2 (Semtech Implementation):

  • Memory usage:T × T + 2 × T + 2 × M
  • where T is the maximum number of allowed packet losses (T ≤ M)
  • Advantage: Optimized for low packet-loss rate scenarios, significantly reducing memory requirements

Decoding Steps:

  1. Device receives blocks and records the packet loss bitmap
  2. After receiving the encoded blocks, attempt to recover the missing original data blocks
  3. When the number of valid received data blocks ≥ M, start decoding
  4. Recover all original data blocks through matrix operations (Gaussian elimination)
  5. Perform CRC32/SHA256 verification on the recovered firmware
  6. After checksum verification passes, write to Flash storage and restart to apply the upgrade

10.4 Technical Advantages

  1. High Reliability: LDPC forward error correction adapts to the high packet-loss environment of LoRaWAN
  2. Low Network Load: No uplink acknowledgement required, reducing airtime usage
  3. Batch Upgrade: Supports multicast, enabling simultaneous upgrades of hundreds of devices
  4. Resume After Restart: Devices can continue receiving remaining fragments after a power cycle restart
  5. Strong compatibility: Based on LoRa Alliance standard protocols, compatible with multiple device types

10.5 Supported Device Types

The IMX93-GW8016 gateway is fully compatible with Shenzhen UniTalk Technology's proprietary LoRaWAN devices (e.g., the Sensor Box series) and supports FUOTA for the following devices:

  • Multi-feature sensor box
  • Industrial-grade I/O controllers